The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 11, 2019

Filed:

Oct. 13, 2017
Applicant:

Lg Display Co., Ltd., Seoul, KR;

Inventors:

Osung Do, Paju-si, KR;

Juyoung Noh, Paju-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G 5/00 (2006.01); G09G 3/20 (2006.01); G09G 3/3225 (2016.01); G09G 3/3266 (2016.01); G09G 3/3275 (2016.01);
U.S. Cl.
CPC ...
G09G 3/2096 (2013.01); G09G 3/3225 (2013.01); G09G 5/008 (2013.01); G09G 3/3266 (2013.01); G09G 3/3275 (2013.01); G09G 2310/08 (2013.01); G09G 2320/0233 (2013.01); G09G 2320/043 (2013.01); G09G 2320/045 (2013.01); G09G 2330/02 (2013.01); G09G 2370/08 (2013.01); G09G 2370/10 (2013.01);
Abstract

The display device according to an embodiment of the present disclosure comprises a display panel; a source drive IC configured to provide data voltages to the pixels, convert signals indicating driving characteristics of the pixels into sensing data and output the sensing data; and a timing controller configured to transmit a control data packet and a video data packet to the source drive IC through first and second wire pairs and receive the sensing data from the source drive IC through the second wire pair, wherein the timing controller is configured to load lock information indicating whether a clock extracted from a signal provided from the source drive IC through the second wire pair is locked or not into the control data packet and provide the control data packet to the source drive IC through the first wire pair, when receiving data from the source drive IC.


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