The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 11, 2019

Filed:

Aug. 22, 2017
Applicant:

Lg Display Co., Ltd., Seoul, KR;

Inventors:

HyungBeom Shin, Goyang-si, KR;

DukKeun Yoo, Seoul, KR;

ChanHo Lee, Paju-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 3/14 (2006.01); G09G 3/00 (2006.01); G09G 3/36 (2006.01); G06F 3/147 (2006.01); G02F 1/1333 (2006.01); G02F 1/1337 (2006.01); G02F 1/1345 (2006.01); G02F 1/1362 (2006.01);
U.S. Cl.
CPC ...
G06F 3/1446 (2013.01); G02F 1/13452 (2013.01); G02F 1/13454 (2013.01); G02F 1/136286 (2013.01); G06F 3/147 (2013.01); G09G 3/003 (2013.01); G09G 3/3648 (2013.01); G02F 1/1337 (2013.01); G02F 1/13336 (2013.01); G02F 2201/56 (2013.01); G09G 3/3677 (2013.01); G09G 3/3688 (2013.01); G09G 2300/026 (2013.01); G09G 2300/0426 (2013.01); G09G 2300/0452 (2013.01); G09G 2310/0283 (2013.01);
Abstract

A display device can include a display panel including data lines and gate lines on a triangular-shaped board, and a plurality of pixels in a matrix arrangement, in which pixel rows are arranged with a step for each at least one gate line among the gate lines based on a number of the plurality of pixels connected to each of the gate lines; a data-driving unit on a first side of the triangular-shaped board, and configured to supply data voltages to the data lines to drive the data lines; and a gate-driving unit including a plurality of gate-in-panels (GIPs) on a second side of the triangular-shaped board, in which the plurality of gate-in-panels are arranged to correspond to the step for each of the at least one gate line and sequentially supply a gate signal to the plurality of gate lines to sequentially drive the gate lines.


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