The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 11, 2019

Filed:

Nov. 19, 2013
Applicant:

Maxim Integrated Products, Inc., San Jose, CA (US);

Inventors:

Morris R. Fox, Los Altos, CA (US);

Eric G. Anusevicius, Brunswick, GA (US);

Assignee:

MAXIM INTEGRATED PRODUCTS, INC., San Jose, CA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 31/28 (2006.01); H01L 21/68 (2006.01);
U.S. Cl.
CPC ...
G01R 31/2867 (2013.01); H01L 21/68 (2013.01); Y10T 29/49998 (2015.01);
Abstract

A precision alignment unit and techniques are described that include a tray assembly configured to be used in a testing system, where the tray assembly includes at least one pocket formed in the tray assembly, the pocket configured to contain an integrated circuit chip, and at least one pin pass-through, and a device positioning unit including at least one alignment device configured to extend through the at least one pin pass-through. In implementations, a process for using the precision alignment system that employs the techniques of the present disclosure includes mounting a precision alignment unit to a vacuum chuck of a handler; loading at least one alignment tray into the handler; placing the at least one alignment tray on the precision alignment unit; and aligning at least one integrated circuit chip device disposed on the at least one alignment tray.


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