The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 04, 2019

Filed:

Oct. 30, 2017
Applicant:

Renesas Electronics Corporation, Tokyo, JP;

Inventors:

Ryo Kanda, Tokyo, JP;

Hitoshi Matsuura, Hitachinaka, JP;

Shuichi Kikuchi, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/739 (2006.01); H01L 29/40 (2006.01); H01L 29/06 (2006.01); H01L 29/423 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7397 (2013.01); H01L 29/0619 (2013.01); H01L 29/0692 (2013.01); H01L 29/407 (2013.01); H01L 29/4238 (2013.01);
Abstract

A high-performance trench gate IGBT is provided. A trench gate IGBT according to one embodiment includes: a semiconductor substrate (); a channel layer () provided on the semiconductor substrate (); two floating P-type layer () provided on both sides of the channel layer, the floating P-type layers () being deeper than the channel layer (); two emitter trenches () disposed between the two floating P-type layers (), the emitter trenches () being respectively in contact with the floating P-type layers (); at least two gate trenches () disposed between the two emitter trenches (); and a source diffusion layer () disposed between the two gate trenches, the source diffusion layer () being in contact with each of the gate trenches ().


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