The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 04, 2019

Filed:

Jun. 12, 2018
Applicant:

Focaltech Systems Co., Ltd., Hsinchu, TW;

Inventor:

Chun-Fu Wang, Hsinchu, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 51/52 (2006.01); H01L 27/32 (2006.01); H01L 51/05 (2006.01); H01L 51/50 (2006.01);
U.S. Cl.
CPC ...
H01L 27/3244 (2013.01); H01L 27/3262 (2013.01); H01L 51/0508 (2013.01); H01L 51/5012 (2013.01); H01L 51/52 (2013.01); H01L 51/5203 (2013.01); H01L 51/5206 (2013.01); H01L 51/5221 (2013.01); H01L 51/504 (2013.01); H01L 51/5036 (2013.01); H01L 51/5056 (2013.01); H01L 51/5072 (2013.01); H01L 51/5296 (2013.01); H01L 2251/5392 (2013.01);
Abstract

An organic light-emitting diode panel and a manufacturing method using the same are provided in the present invention. The OLED panel includes at least a pixel. The pixel includes an anode conducting layer, an insulation layer, an emitting layer (EML), a cathode layer and a reference voltage layer. The anode conducting layer is disposed on a transparent substrate. The insulation layer is disposed on the anode conducting layer and has a first cavity and a second cavity, wherein there is a distance between the first anode layer and the bottom of second cavity. There are a hole injection layer (HIL) and a hole transmission layer (HTL). The HIL is disposed on the first anode conducting layer. The HTL is disposed on the HIL. There are a cathode layer, an electronic injection layer (EIL) and an electronic transmission layer (ETL) in the second cavity. The cathode layer is exposed by the bottom of the second cavity. The EIL is disposed on the cathode layer. The ETL is disposed on the EIL. The EML is disposed on the insulation layer. The reference voltage layer is disposed on the EML.


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