The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 04, 2019

Filed:

Aug. 16, 2016
Applicants:

Christopher F. Kirby, Gambrills, MD (US);

Sandro J. Di Giacomo, Ellicott City, MD (US);

Michael Rennie, Mechanicsville, VA (US);

Inventors:

Christopher F. Kirby, Gambrills, MD (US);

Sandro J. Di Giacomo, Ellicott City, MD (US);

Michael Rennie, Mechanicsville, VA (US);

Assignee:

NORTHROP GRUMMAN SYSTEMS CORPORATION, Falls Church, VA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/768 (2006.01); H01L 23/532 (2006.01); H01L 21/02 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76891 (2013.01); H01L 21/02074 (2013.01); H01L 21/76883 (2013.01); H01L 23/53285 (2013.01);
Abstract

A method is provided of forming a superconductor device interconnect structure. The method includes forming a first dielectric layer overlying a substrate, and forming a superconducting interconnect element in a first dielectric layer, such that the superconducting interconnect element has a top surface aligned with a top surface of the first dielectric layer to form a first interconnect layer. The method also includes performing a plasma clean on a top surface of the first interconnect layer, and depositing a second dielectric layer over the first dielectric layer.


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