The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 04, 2019

Filed:

Mar. 15, 2017
Applicants:

Toyota Jidosha Kabushiki Kaisha, Toyota-shi, Aichi-ken, JP;

Sumco Corporation, Tokyo, JP;

Inventors:

Tetsuya Yamada, Seto, JP;

Hiromichi Kinpara, Seto, JP;

Shinjirou Uchida, Tokyo, JP;

Masamitsu Fukuda, Tokyo, JP;

Assignees:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/265 (2006.01); H01L 21/266 (2006.01); H01L 21/324 (2006.01); H01L 21/761 (2006.01); H01L 21/762 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76243 (2013.01); H01L 21/266 (2013.01); H01L 21/26533 (2013.01); H01L 21/324 (2013.01); H01L 21/761 (2013.01); H01L 21/7624 (2013.01);
Abstract

A method of manufacturing a silicon on insulator substrate includes: preparing a semiconductor substrate including a rear side semiconductor layer, an insulating layer, and a front side semiconductor layer, a first surface of the insulating layer being in contact with a surface of the rear side semiconductor layer, and a first surface of the front side semiconductor layer being in contact with a second surface of the insulating layer; forming a high concentration region in which an impurity concentration is increased in the front side semiconductor layer, by injecting impurities into the front side semiconductor layer; heating the semiconductor substrate having the high concentration region; and epitaxially growing an additional semiconductor layer on a second surface of the front side semiconductor layer of the heated semiconductor substrate, the additional semiconductor layer having a lower impurity concentration than the high concentration region.


Find Patent Forward Citations

Yamada, Tetsuya. (2019). Method of manufacturing silicon on insulator substrate (U.S. Patent No. 10312133). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10312133

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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