The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 04, 2019

Filed:

Jun. 14, 2017
Applicant:

The Regents of the University of Michigan, Ann Arbor, MI (US);

Inventors:

Qing Dong, Ann Arbor, MI (US);

David T. Blaauw, Ann Arbor, MI (US);

Dennis Sylvester, Ann Arbor, MI (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G05F 3/20 (2006.01); G05F 3/26 (2006.01); G05F 1/46 (2006.01); G05F 1/618 (2006.01);
U.S. Cl.
CPC ...
G05F 3/262 (2013.01); G05F 1/462 (2013.01); G05F 1/463 (2013.01); G05F 1/618 (2013.01);
Abstract

A sub-nW voltage reference is presented that provides inherently low process variation and enables trim-free operation for low-dropout regulators and other applications in nW microsystems. Sixty chips from three different wafers in 180 nm CMOS are measured, showing an untrimmed within-wafer σ/μ of 0.26% and wafer-to-wafer σ/μ of 1.9%. Measurement results also show a temperature coefficient of 48-124 ppm/° C. from −40° C. to 85° C. Outputting a 0.986V reference voltage, the reference operates down to 1.2V and consumes 114 pW at 25° C.


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