The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 28, 2019

Filed:

Feb. 22, 2017
Applicant:

Ceva D.s.p. Ltd., Herzlia Pituach, IL;

Inventor:

David Levy, Raanana, IL;

Assignee:

Ceva D.S.P. Ltd., Herzlia Pituach, IL;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04W 28/22 (2009.01); H04L 29/06 (2006.01); H03M 13/27 (2006.01); H03M 13/29 (2006.01); H03M 13/00 (2006.01); H04L 1/00 (2006.01);
U.S. Cl.
CPC ...
H04W 28/22 (2013.01); H03M 13/271 (2013.01); H03M 13/2957 (2013.01); H03M 13/635 (2013.01); H03M 13/6525 (2013.01); H04L 1/0013 (2013.01); H04L 69/22 (2013.01);
Abstract

A method and a logic circuit for rate matching for three equally sized bit streams, including: prepending each of the bit streams with null bits; permuting the first two bit streams according to a first permutation pattern; permuting the third bit stream based on the first permutation pattern; transposing the three bit streams; shuffling the second and third bit streams; removing the null bits from the first bit stream and from the shuffled bit stream, wherein location of the null bits in the first bit stream is based only on a number of prepended null bits and the first permutation pattern and location of the null bits in the shuffled bit stream is based only on the number of prepended null bits, the first permutation pattern, and a null index related to the number of prepended null bits; and generating a combined bit stream from the three bit streams.


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