The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 28, 2019

Filed:

Jun. 07, 2018
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventor:

Eleazar Walter Kenyon, Tucker, GA (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03H 7/30 (2006.01); H04L 25/03 (2006.01); H04L 7/033 (2006.01); H04L 27/00 (2006.01);
U.S. Cl.
CPC ...
H04L 25/03057 (2013.01); H04L 7/0331 (2013.01); H04L 27/0014 (2013.01); H04L 2027/0067 (2013.01); H04L 2027/0069 (2013.01); H04L 2027/0075 (2013.01);
Abstract

A receiver module includes a clock recovery circuit and a decision feedback equalizer (DFE) circuit. The DFE circuit includes a data feedback loop configured to sample an input data stream combined with equalization values based on a first clock signal. The DFE circuit also includes an edge feedback loop configured to sample the input data stream combined with equalization values based on a second clock signal. The clock recovery circuit is configured to determine a phase error between a receiver clock signal and a target clock signal based on output samples from the data feedback loop and the edge feedback loop.


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