The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 28, 2019

Filed:

Mar. 29, 2018
Applicant:

Semiconductor Components Industries, Llc, Phoenix, AZ (US);

Inventors:

Gang Chen, Tai Po, HK;

Michael A. Stapleton, Scottsdale, AZ (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02M 1/00 (2006.01); H02M 1/08 (2006.01); H02M 3/335 (2006.01);
U.S. Cl.
CPC ...
H02M 1/08 (2013.01); H02M 3/33576 (2013.01); H02M 2001/0032 (2013.01);
Abstract

Improved current doubling DC-DC converters having an efficient sleep mode. An illustrative converter embodiment includes: a transformer, first and second inductors coupled together at a first voltage output terminal, a reserve capacitor coupled to a second output voltage terminal, a primary switch array, a secondary switch array, and a controller. The first and second inductors each have a drive terminal coupled to a respective terminal of the transformer secondary. The primary switch array operates to convert an input voltage into forward voltage pulses and reverse voltage pulses on the transformer primary. The secondary switch array selectively couples the first inductor's drive terminal to either a charge terminal of the reserve capacitor or to the second voltage output terminal. The controller at least temporarily suspends operation of the primary switch array during a sleep mode, and uses the reserve capacitor to sustain a voltage at the first voltage output terminal.


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