The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 28, 2019

Filed:

Jul. 28, 2017
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;

Inventor:

Masayuki Terai, Suwon-si, KR;

Assignee:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 45/00 (2006.01); H01L 21/02 (2006.01); C23C 16/34 (2006.01); H01L 27/24 (2006.01);
U.S. Cl.
CPC ...
H01L 45/124 (2013.01); C23C 16/34 (2013.01); H01L 21/02414 (2013.01); H01L 21/02417 (2013.01); H01L 21/02483 (2013.01); H01L 27/2409 (2013.01); H01L 27/2472 (2013.01); H01L 45/122 (2013.01); H01L 45/126 (2013.01); H01L 45/1233 (2013.01); H01L 45/1253 (2013.01); H01L 45/16 (2013.01); H01L 45/1666 (2013.01); H01L 45/1675 (2013.01); H01L 45/1691 (2013.01); H01L 27/2427 (2013.01); H01L 45/144 (2013.01); H01L 45/1683 (2013.01);
Abstract

A memory cell pillar of a memory device includes a heating electrode having a base portion (leg) and a fin portion (ascender), and a selection device between a first conductive line and the heating electrode. A side surface of the selection device and a side surface of the fin portion extend along a first straight line. A method of fabricating a memory device includes forming a plurality of first insulating walls through a stack structure including a preliminary selection device layer and a preliminary electrode layer, forming a plurality of self-aligned preliminary heating electrode layers, forming a plurality of second insulating walls each between two of the plurality of first insulating walls, and forming a plurality of third insulating walls in a plurality of holes extending along a direction intersecting the plurality of first insulating walls.


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