The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 28, 2019

Filed:

Mar. 28, 2018
Applicant:

Samsung Electro-mechanics Co., Ltd., Suwon-si, Gyeonggi-do, KR;

Inventors:

Jong Man Kim, Suwon-si, KR;

Han Kim, Suwon-si, KR;

Kyung Ho Lee, Suwon-si, KR;

Assignee:

SAMSUNG ELECTRO-MECHANICS CO., LTD., Suwon-si, Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 23/31 (2006.01); H01L 23/495 (2006.01); H01L 25/065 (2006.01); H01L 21/48 (2006.01); H01L 23/538 (2006.01);
U.S. Cl.
CPC ...
H01L 23/562 (2013.01); H01L 23/3121 (2013.01); H01L 23/5383 (2013.01); H01L 23/5384 (2013.01); H01L 25/0655 (2013.01);
Abstract

A fan-out semiconductor package includes a wiring portion, semiconductor chips, a dummy chip, and an encapsulant. The wiring portion includes an insulating layer, conductive patterns formed on the insulating layer, and conductive vias penetrating through the insulating layer and connected to the conductive patterns. The semiconductor chips are disposed on one region of the wiring portion, and the dummy chip is disposed on another region thereof and has a thickness smaller than those of the semiconductor chips. The encapsulant encapsulates at least portions of the semiconductor chips and the dummy chip. An upper surface of the wiring portion is disposed below a center line of the fan-out semiconductor package, and the thickness t of the dummy chip is such that T/2≤t≤3T/2 in which T is a distance from the upper surface of the wiring portion to the center line of the fan-out semiconductor package.


Find Patent Forward Citations

Loading…