The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 28, 2019
Filed:
Sep. 14, 2017
Applicant:
Toshiba Memory Corporation, Minato-ku, JP;
Inventors:
Takanobu Ono, Kuwana, JP;
Tsutomu Fujita, Yokkaichi, JP;
Assignee:
Toshiba Memory Corporation, Minato-ku, JP;
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/78 (2006.01); H01L 23/544 (2006.01); H01L 21/268 (2006.01); H01L 21/683 (2006.01); H01L 21/304 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 21/78 (2013.01); H01L 21/268 (2013.01); H01L 21/304 (2013.01); H01L 21/6836 (2013.01); H01L 23/544 (2013.01); H01L 23/562 (2013.01); H01L 2221/68336 (2013.01); H01L 2223/5446 (2013.01); H01L 2223/54426 (2013.01);
Abstract
According to an embodiment, a method of manufacturing a semiconductor device includes forming a first modified zone in a wafer by irradiating the wafer with a laser having transmissivity with respect to the wafer along a part of a dicing line on the wafer, and forming a second modified zone in the wafer by irradiating the wafer with the laser along the dicing line on the wafer. The first modified zone is partially formed between a surface of the wafer and the second modified zone, a semiconductor interconnect layer being formed on the surface of the wafer.