The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 28, 2019
Filed:
Mar. 02, 2017
Semiconductor Energy Laboratory Co., Ltd., Atsugi-shi, Kanagawa-ken, JP;
Semiconductor Energy Laboratory Co., Ltd., Atsugi-shi, Kanagawa-ken, JP;
Abstract
A circuit is provided which is constituted by TFTs of one conductivity type, and which is capable of outputting signals of a normal amplitude. When an input clock signal CKbecomes a high level, each of TFTs () is turned on to settle at a low level the potential at a signal output section (Out). A pulse is then input to a signal input section (In) and becomes high level. The gate potential of TFT () is increased to (VDD−V thN) and the gate is floated. TFT () is thus turned on. Then CKbecomes low level and each of TFTs () is turned off. Simultaneously, CKbecomes high level and the potential at the signal output section is increased. Simultaneously, the potential at the gate of TFT () is increased to a level equal to or higher than (VDD+V thN) by the function of capacitor (), so that the high level appearing at the signal output section (Out) becomes equal to VDD. When SP becomes low level; CKbecomes low level; and CKbecomes high level, the potential at the signal output section (Out) becomes low level again.