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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10303616 B1

PDFFull Text
Date of Patent:
May. 28, 2019

Filed:

Oct. 16, 2013

Migration scheme for unified virtual memory system

Applicant:

Nvidia Corporation, Santa Clara, CA (US);

Inventors:

Jerome F. Duluk, Jr., Palo Alto, CA (US);

Chenghuan Jia, Fremont, CA (US);

John Mashey, Portola Valley, CA (US);

Cameron Buschardt, Round Rock, TX (US);

Sherry Cheung, San Jose, CA (US);

James Leroy Deming, Madison, AL (US);

Samuel H. Duncan, Arlington, MA (US);

Lucien Dunning, Santa Clara, CA (US);

Robert George, Austin, TX (US);

Arvind Gopalakrishnan, San Jose, CA (US);

Mark Hairgrove, San Jose, CA (US);

Assignee:

NVIDIA CORPORATION, Santa Clara, CA (US);

Attorney:

Artegis Law Group, LLP

Primary Examiner:

Chun Kuan Lee

Int. Cl.
CPC ...
G06F 13/12 (2006.01); G06F 13/38 (2006.01); G06F 12/1009 (2016.01); G06F 12/109 (2016.01); G06F 12/1072 (2016.01); G06F 11/07 (2006.01); G06F 12/12 (2016.01); G06F 12/08 (2016.01); G06F 12/10 (2016.01);
U.S. Cl.
CPC ...
G06F 12/1009 (2013.01); G06F 11/073 (2013.01); G06F 11/0793 (2013.01); G06F 12/08 (2013.01); G06F 12/109 (2013.01); G06F 12/1072 (2013.01); G06F 12/12 (2013.01); G06F 12/10 (2013.01); G06F 2212/1016 (2013.01);
Abstract

A system for managing virtual memory. The system includes a first processing unit configured to execute a first operation that references a first virtual memory address. The system also includes a first memory management unit (MMU) associated with the first processing unit and configured to generate a first page fault upon determining that a first page table that is stored in a first memory unit associated with the first processing unit does not include a mapping corresponding to the first virtual memory address. The system further includes a first copy engine associated with the first processing unit. The first copy engine is configured to read a first command queue to determine a first mapping that corresponds to the first virtual memory address and is included in a first page state directory. The first copy engine is also configured to update the first page table to include the first mapping.

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