The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 28, 2019

Filed:

Apr. 30, 2018
Applicant:

Globalfoundries Inc., Grand Cayman, KY;

Inventors:

Navneet Jain, Milpitas, CA (US);

Arif A. Siddiqi, Milpitas, CA (US);

Mahbub Rashed, Cupertino, CA (US);

Assignee:

GLOBALFOUNDRIES INC., Grand Cayman, KY;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G05F 3/20 (2006.01); G11C 5/14 (2006.01); H03K 19/00 (2006.01); H01L 29/78 (2006.01); H01L 29/06 (2006.01); H01L 27/092 (2006.01);
U.S. Cl.
CPC ...
G05F 3/205 (2013.01); G11C 5/146 (2013.01); H03K 19/0027 (2013.01); H01L 27/092 (2013.01); H01L 29/0649 (2013.01); H01L 29/7838 (2013.01); H03K 2217/0018 (2013.01);
Abstract

Disclosed is a voltage generator that includes a first voltage generation circuit and a second voltage generation circuit. The first voltage generation circuit is selectively operable in a single trimming mode enabling positive trimming only or in a dual trimming mode that shifts the voltage range downward enabling a somewhat smaller amount of positive trimming and also some negative trimming. The second voltage generation circuit is selectively operable in a single trimming mode enabling negative trimming only or in a dual trimming mode that shifts the voltage range upward enabling a somewhat smaller amount of negative trimming and also some positive trimming. Also disclosed is an integrated circuit (IC) chip that incorporates one or more such voltage generators for back-biasing the field effect transistors in one or more circuit blocks, respectively.


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