The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 21, 2019

Filed:

May. 04, 2017
Applicant:

Murata Manufacturing Co., Ltd., Nagaokakyo-shi, Kyoto-fu, JP;

Inventors:

Yasuo Fujii, Nagaokakyo, JP;

Hiroaki Hori, Nagaokakyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 1/00 (2006.01); H05K 1/02 (2006.01); H01G 4/012 (2006.01); H01G 4/248 (2006.01); H01G 4/30 (2006.01); H03H 7/38 (2006.01); H05K 1/11 (2006.01); H05K 1/18 (2006.01); H05K 3/30 (2006.01); H01G 4/35 (2006.01); H01G 4/40 (2006.01); H01G 2/06 (2006.01); H01G 4/232 (2006.01);
U.S. Cl.
CPC ...
H05K 1/0231 (2013.01); H01G 2/06 (2013.01); H01G 4/012 (2013.01); H01G 4/232 (2013.01); H01G 4/248 (2013.01); H01G 4/30 (2013.01); H01G 4/35 (2013.01); H01G 4/40 (2013.01); H03H 7/38 (2013.01); H05K 1/115 (2013.01); H05K 1/181 (2013.01); H05K 3/303 (2013.01); H05K 1/0262 (2013.01); H05K 2201/10015 (2013.01); H05K 2201/10522 (2013.01); H05K 2201/10545 (2013.01); H05K 2201/10734 (2013.01); Y02P 70/611 (2015.11);
Abstract

A wiring board is provided with power supply patterns for each type of power supply of an IC. An IC has a plurality of power supply terminals for each type of power supply. For each type of power supply, two or more laminated capacitors are provided in parallel between the power supply of IC and a ground. Two or more laminated capacitors provided for each type of power supply include a laminated capacitor having a Q factor of less than about 0.5. For each type of power supply, in order to satisfy a target impedance, two or more laminated capacitors are arranged and distributed such that at least half of the plurality of power supply terminals are included in a region obtained by combining cover areas.


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