The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 21, 2019

Filed:

Mar. 31, 2016
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Eugene Robert Worley, Irvine, CA (US);

Reza Jalilizeinali, Carlsbad, CA (US);

Sreeker Dundigal, San Diego, CA (US);

Wen-Yi Chen, San Diego, CA (US);

Krishna Chaitanya Chillara, San Diego, CA (US);

Taeghyun Kang, San Diego, CA (US);

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02H 9/04 (2006.01); H03M 9/00 (2006.01); H03K 19/0185 (2006.01); H03K 19/003 (2006.01);
U.S. Cl.
CPC ...
H02H 9/046 (2013.01); H03K 19/00315 (2013.01); H03K 19/018528 (2013.01); H03K 19/018592 (2013.01); H03M 9/00 (2013.01);
Abstract

A method of protecting a serializer/deserializer (SERDES) differential input/output (I/O) circuit includes detecting an electrostatic discharge event. The method also includes selectively disengaging a power supply terminal from a pair of I/O transistors of the SERDES differential I/O circuit in response to the detected electrostatic discharge event. The method further includes selectively disengaging a ground terminal from the pair of I/O transistors of the SERDES differential I/O circuit in response to the detected electrostatic discharge event.


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