The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 21, 2019
Filed:
Oct. 26, 2017
Applicant:
Olympus Corporation, Hachioji-shi, Tokyo, JP;
Inventors:
Assignee:
OLYMPUS CORPORATION, Tokyo, JP;
Primary Examiner:
Int. Cl.
CPC ...
H04N 5/369 (2011.01); H01L 27/146 (2006.01); H04N 5/365 (2011.01); H04N 5/351 (2011.01); H04N 5/374 (2011.01); H04N 5/378 (2011.01);
U.S. Cl.
CPC ...
H01L 27/14612 (2013.01); H01L 27/14603 (2013.01); H04N 5/351 (2013.01); H04N 5/369 (2013.01); H04N 5/3658 (2013.01); H04N 5/374 (2013.01); H04N 5/378 (2013.01);
Abstract
A semiconductor device includes a pixel array, a plurality of column circuits, an amplifier, switch arrays of a first layer to an nlayer, and signal lines of the first layer to the nlayer. n is an integer of two or more. The switch array of an ilayer is disposed between the switch array of an (i+1)layer and the amplifier. i is an integer of one or more and less than n. The signal line of the first layer is connected to the namplifier. The signal line of the nlayer is connected to the switch array of the nlayer. Each of the plurality of switches included in the switch array of the nlayer is connected to the column circuit.