The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 21, 2019

Filed:

Jul. 12, 2017
Applicant:

Boe Technology Group Co., Ltd., Beijing, CN;

Inventor:

Yu'e Jia, Beijing, CN;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/12 (2006.01); G02F 1/135 (2006.01); H01L 27/32 (2006.01); G09G 3/36 (2006.01); G02F 1/136 (2006.01); G02F 1/1362 (2006.01); H01L 51/05 (2006.01); H01L 51/52 (2006.01); G02F 1/1337 (2006.01); G02F 1/1343 (2006.01);
U.S. Cl.
CPC ...
H01L 27/1214 (2013.01); G02F 1/135 (2013.01); G02F 1/136 (2013.01); G02F 1/136286 (2013.01); G09G 3/36 (2013.01); G09G 3/3637 (2013.01); G09G 3/3685 (2013.01); G09G 3/3696 (2013.01); H01L 27/124 (2013.01); H01L 27/3232 (2013.01); H01L 51/0529 (2013.01); G02F 2001/133757 (2013.01); G02F 2001/134345 (2013.01); G09G 2310/0251 (2013.01); H01L 51/5203 (2013.01);
Abstract

The present disclosure discloses a display panel, a display device and a driving method thereof. The display panel comprises: a first substrate and a second substrate arranged opposite to each other, and liquid crystals disposed between the first substrate and the second substrate, the first substrate comprising a plurality of gate lines and a plurality of data lines, wherein the first substrate is provided with a plurality of pixel regions distributed in an array, each of the plurality of pixel regions being provided with liquid crystals having four initial pretilt angles and comprising a first sub-pixel region and a second sub-pixel region arranged in a scanning direction, each of the first sub-pixel region and the second sub-pixel region being provided with one thin film transistor; each of the plurality of gate lines is connected to gates of all the thin film transistors in a row of pixel regions, each of the plurality of data lines being connected to a first electrode of all the thin film transistors in a column of pixel regions, the first electrode being one of a source and a drain; and the display panel further comprises a driving circuit for providing different gate turn-on voltages to two adjacent gate lines.


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