The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 21, 2019

Filed:

Sep. 05, 2014
Applicant:

Infineon Technologies Ag, Neubiberg, DE;

Inventor:

Dietrich Bonart, Bad Abbach, DE;

Assignee:

Infineon Technologies AG, Neubiberg, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 25/16 (2006.01); H01L 21/768 (2006.01); H01L 21/78 (2006.01); H01L 23/528 (2006.01); H01L 25/00 (2006.01); H01L 25/18 (2006.01); H01L 23/522 (2006.01); H01L 29/06 (2006.01); H01L 23/00 (2006.01); H01L 23/31 (2006.01); H01L 25/065 (2006.01);
U.S. Cl.
CPC ...
H01L 25/16 (2013.01); H01L 21/768 (2013.01); H01L 21/78 (2013.01); H01L 23/3178 (2013.01); H01L 23/522 (2013.01); H01L 23/528 (2013.01); H01L 23/5221 (2013.01); H01L 24/24 (2013.01); H01L 24/82 (2013.01); H01L 24/83 (2013.01); H01L 24/94 (2013.01); H01L 25/0655 (2013.01); H01L 25/18 (2013.01); H01L 25/50 (2013.01); H01L 29/0657 (2013.01); H01L 24/32 (2013.01); H01L 2224/24147 (2013.01); H01L 2224/29124 (2013.01); H01L 2224/29157 (2013.01); H01L 2224/29166 (2013.01); H01L 2224/29181 (2013.01); H01L 2224/29184 (2013.01); H01L 2224/32145 (2013.01); H01L 2224/32502 (2013.01); H01L 2224/32506 (2013.01); H01L 2224/73267 (2013.01); H01L 2224/82097 (2013.01); H01L 2224/8383 (2013.01); H01L 2224/83191 (2013.01); H01L 2224/83894 (2013.01); H01L 2224/92244 (2013.01); H01L 2224/94 (2013.01); H01L 2924/01322 (2013.01); H01L 2924/1301 (2013.01); H01L 2924/1305 (2013.01); H01L 2924/1306 (2013.01); H01L 2924/15153 (2013.01); H01L 2924/15165 (2013.01); H01L 2924/181 (2013.01);
Abstract

An embodiment of the present invention describes a method for forming a doped region at a first major surface of a semiconductor substrate where the first doped region being part of a first semiconductor device. The method includes forming an opening from the first major surface into the semiconductor substrate and attaching a semiconductor die to the semiconductor substrate at the opening. The semiconductor die includes a second semiconductor device, which is a different type of semiconductor device than the first semiconductor device. The method further includes forming a chip isolation region on sidewalls of the opening and surrounding the second semiconductor device, and singulating the semiconductor substrate.


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