The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 21, 2019

Filed:

May. 17, 2017
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Anindita Borah, Bangalore, IN;

Muthusubramanian Venkateswaran, Bengaluru, IN;

Kushal D. Murthy, Bangalore, IN;

Vikram Gakhar, Bangalore, IN;

Preetam Tadeparthy, Bangalore, IN;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/00 (2006.01); G11C 29/38 (2006.01); G11C 29/36 (2006.01); G11C 17/08 (2006.01); G11C 17/16 (2006.01); G11C 17/18 (2006.01);
U.S. Cl.
CPC ...
G11C 29/38 (2013.01); G11C 17/08 (2013.01); G11C 17/16 (2013.01); G11C 17/18 (2013.01); G11C 29/36 (2013.01);
Abstract

A one-time programmable (OTP) circuit. The OTP circuit includes a non-volatile OTP memory disposed on a first circuit die. The OTP memory includes a floating gate terminal. The OTP circuit also includes a cross-coupled latch disposed on the first circuit die and coupled to the OTP memory and volatile memory input circuitry disposed on the first circuit die and coupled to the cross-coupled latch. The volatile memory input circuitry is configured to receive a test value and write the test value into the cross-coupled latch. The OTP circuit is configured to receive a programming command and store the test value in the OTP memory in response to receipt of the programming command.


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