The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 21, 2019

Filed:

Dec. 22, 2016
Applicants:

Boe Technology Group Co., Ltd., Beijing, CN;

Chongqing Boe Optoelectronics Technology Co., Ltd., Chongqing, CN;

Inventors:

Zhuo Xu, Beijing, CN;

Rui Wang, Beijing, CN;

Yajie Bai, Beijing, CN;

Jaikwang Kim, Beijing, CN;

Fei Shang, Beijing, CN;

Haijun Qiu, Beijing, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G 3/36 (2006.01); G02F 1/1362 (2006.01); G02F 1/1368 (2006.01); H01L 27/12 (2006.01); G09G 3/3225 (2016.01); G02F 1/1343 (2006.01); H01L 27/32 (2006.01); H01L 51/52 (2006.01);
U.S. Cl.
CPC ...
G09G 3/3655 (2013.01); G02F 1/1362 (2013.01); G02F 1/1368 (2013.01); G09G 3/3225 (2013.01); G09G 3/3614 (2013.01); G09G 3/3648 (2013.01); H01L 27/12 (2013.01); H01L 27/124 (2013.01); G02F 1/13624 (2013.01); G02F 1/134336 (2013.01); G02F 1/136286 (2013.01); G09G 2300/0426 (2013.01); G09G 2300/0439 (2013.01); G09G 2300/0861 (2013.01); G09G 2310/0251 (2013.01); G09G 2320/0204 (2013.01); G09G 2330/021 (2013.01); G09G 2340/0407 (2013.01); H01L 27/3276 (2013.01); H01L 51/5206 (2013.01);
Abstract

The present application discloses an array substrate, a driving method thereof, and related display apparatus based on an improved dual-gate scheme. The array substrate includes multiple groups each having two columns of pixel electrodes without laying a data line in a gap between the two columns. Each group includes multiple second transistors for pre-charging respective pairs of pixel electrodes having reversed polarities in each corresponding scanning cycle. Before each pixel electrode is charged via a first transistor, turning on the second transistor allows charge sharing between the two pixel electrodes having reversed polarities so that the charging time of each pixel electrodes is substantially reduced and the operation power is saved.


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