The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 14, 2019
Filed:
Jun. 14, 2018
Applicant:
Pericom Semiconductor Corporation, Milpitas, CA (US);
Inventors:
Jin-sheng Wang, Cupertino, CA (US);
Kai Hung Yu, San Jose, CA (US);
Assignee:
Diodes Incorporated, Milpitas, CA (US);
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/08 (2006.01); H03L 7/089 (2006.01); H03L 7/087 (2006.01); H04L 1/00 (2006.01); H04L 7/027 (2006.01); H04L 7/00 (2006.01); H04L 7/033 (2006.01); H03L 7/099 (2006.01); H03L 7/091 (2006.01);
U.S. Cl.
CPC ...
H03L 7/0891 (2013.01); H03L 7/087 (2013.01); H03L 7/0807 (2013.01); H03L 7/091 (2013.01); H03L 7/099 (2013.01); H04L 1/0082 (2013.01); H04L 7/0087 (2013.01); H04L 7/027 (2013.01); H04L 7/0331 (2013.01);
Abstract
Referenceless clock and data recovery circuits are described that operate to align the clock/data strobe with each data eye to achieve a low bit error rate. The appropriate frequency and phase to be used is determined by an edge counter based frequency error detector and a phase error detector.
Wang, Jin-sheng. (2019). Referenceless clock and data recovery circuits (U.S. Patent No. 10291241). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10291241
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile