The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 14, 2019

Filed:

Dec. 27, 2017
Applicant:

Infineon Technologies Dresden Gmbh, Dresden, DE;

Inventors:

Stefan Tegen, Dresden, DE;

Marko Lemke, Dresden, DE;

Rolf Weis, Dresden, DE;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/45 (2006.01); H01L 29/739 (2006.01); H01L 29/06 (2006.01); H01L 29/10 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01); H01L 27/088 (2006.01); H01L 29/417 (2006.01); H01L 21/8234 (2006.01); H01L 29/40 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7813 (2013.01); H01L 21/823487 (2013.01); H01L 27/0883 (2013.01); H01L 29/0696 (2013.01); H01L 29/1095 (2013.01); H01L 29/41766 (2013.01); H01L 29/45 (2013.01); H01L 29/66734 (2013.01); H01L 29/7398 (2013.01); H01L 29/7809 (2013.01); H01L 29/407 (2013.01); H01L 29/7397 (2013.01);
Abstract

A method of manufacturing a semiconductor device includes: forming a doped region in a semiconductor substrate at a first distance to a main surface plane of the semiconductor substrate, wherein the doped region is a first section of a semiconductor column extending from the main surface plane into the semiconductor substrate; forming an insulator structure surrounding at least a second section of the semiconductor column between the main surface plane and the first section in planes parallel to the main surface plane; removing the second section of the semiconductor column; and forming a contact structure extending from the main surface plane to the doped region, wherein the contact structure includes a fill structure and a contact layer, the contact layer formed from a metal semiconductor alloy and directly adjoining the doped region and the fill structure formed from a metal and/or a conductive metal compound.


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