The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 14, 2019

Filed:

Mar. 12, 2018
Applicant:

Toshiba Memory Corporation, Tokyo, JP;

Inventors:

Satoshi Mitsugi, Kanagawa, JP;

Takeshi Suto, Kanagawa, JP;

Takashi Sato, Kanagawa, JP;

Yukiyasu Arisawa, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/027 (2006.01); H01L 23/544 (2006.01); G03F 7/00 (2006.01); H01L 21/66 (2006.01);
U.S. Cl.
CPC ...
H01L 21/027 (2013.01); G03F 7/0002 (2013.01); H01L 22/20 (2013.01); H01L 23/544 (2013.01); H01L 2223/54426 (2013.01);
Abstract

According to an embodiment, a first alignment mark includes a first template-side mark in which a plurality of first portions are arranged with a first period, and a second template-side mark in which a plurality of second portions are arranged with a second period. A second alignment mark includes a first wafer-side mark in which a plurality of third portions are arranged with a third period, and a second wafer-side mark in which a plurality of fourth portions are arranged with a fourth period. The first wafer-side mark and the first template-side mark are configured to be overlaid with each other to constitute a first moire mark. The second wafer-side mark and the second template-side mark are configured to be overlaid with each other to constitute a second moire mark. An average period of the first moire mark and an average period of the second moire mark are different from each other.


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