Non-volatile memory device and error compensation method for verifying the same

Abstract

A non-volatile memory device and an error compensation method for verifying the same are provided. The non-volatile memory device includes a memory block, a word line driver, a bit line circuit and a controller. The memory block includes multiple memory cells. After a first programming process and a first verification process are performed on the memory cells, the controller performs reverse reading to the control terminals of the memory cells, applies a preset voltage to the control terminals of the memory cells according to preset programming data by using the word line driver, reads data from the memory cells by using the bit line circuit, and determines whether the data of each memory cell is normal according to the data read from the memory cells. When the data of specific memory cells is not normal, the controller performs a second programming process to the specific memory cells.