The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 14, 2019
Filed:
Jun. 27, 2017
Xilinx, Inc., San Jose, CA (US);
Chaithanya Dudha, San Jose, CA (US);
Shangzhi Sun, San Jose, CA (US);
Ashish Sirasao, San Jose, CA (US);
Nithin Kumar Guggilla, Hyderabad, IN;
XILINX, INC., San Jose, CA (US);
Abstract
Reducing latency of a circuit design can include determining, using a processor, a set of sequential circuit elements of a circuit design that meets a condition for removal from the circuit design, wherein the condition is dependent upon a target technology process and a target operating frequency. Using the processor, a feasible cut for a selected sequential circuit element of the set is determined. The selected sequential circuit element and each other sequential circuit element of the set that is part of the cut is removed from the circuit design using the processor.