The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 14, 2019

Filed:

Aug. 30, 2016
Applicant:

Altera Corporation, San Jose, CA (US);

Inventors:

Herman Henry Schmit, Palo Alto, CA (US);

Michael David Hutton, Mountain View, CA (US);

Assignee:

Altera Corporation, San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/00 (2006.01); G06F 11/10 (2006.01); H03M 13/05 (2006.01); G06F 11/07 (2006.01); G11C 29/52 (2006.01);
U.S. Cl.
CPC ...
G06F 11/1068 (2013.01); G06F 11/0787 (2013.01); G06F 11/1004 (2013.01); G06F 11/1012 (2013.01); G06F 11/1044 (2013.01); G11C 29/52 (2013.01); H03M 13/05 (2013.01);
Abstract

A computer-aided design (CAD) tool may identify don't care bits in configuration data. The don't care bits in the configuration data may change polarity without affecting the functionality of the circuit design. The CAD tool may compute an error check code (e.g., parity bits for a two-dimensional parity check) and insert the error check code into the configuration data. As an example, the CAD tool may replace don't care bits in the configuration data with the error code. The configuration data may be stored in configuration memory cells on a programmable integrated circuit, thereby implementing the circuit design with the error code on the programmable integrated circuit. During execution, the programmable integrated circuit may execute error checking and detect and correct errors in the configuration data based on the embedded error code.


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