The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 14, 2019

Filed:

May. 19, 2016
Applicant:

Ecole Polytechnique Fédérale DE Lausanne (Epfl), Lausanne, CH;

Inventors:

Marco Pignati, Lausanne, CH;

Lorenzo Zanni, Saint-Sulpice, CH;

Paolo Romano, Lausanne, CH;

Mario Paolone, La Conversion, CH;

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 31/08 (2006.01); G01R 19/25 (2006.01);
U.S. Cl.
CPC ...
G01R 31/088 (2013.01); G01R 31/086 (2013.01); G01R 19/2513 (2013.01); Y02E 60/728 (2013.01); Y04S 10/265 (2013.01); Y04S 10/522 (2013.01);
Abstract

A method for a faulted line identification in a power network, including, at a generic time-instant, solving a plurality of parallel phasor measurement units based real-time state estimators, the state estimators having among each other different and augmented network topologies, each of the augmented network topologies comprises an original network topology, which includes a plurality of real buses and real lines forming a connected graph mapping the real network topology, and a single additional virtual bus located along one of the real lines, the line in which the virtual bus is located has to be different for each of the augmented network topologies.


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