The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 07, 2019

Filed:

Jan. 29, 2018
Applicant:

Cirrus Logic International Semiconductor Ltd., Edinburgh, GB;

Inventors:

Edmund Mark Schneider, Austin, TX (US);

Daniel J. Allen, Austin, TX (US);

Aniruddha Satoskar, Round Rock, TX (US);

Seyedeh Maryam Mortazavi Zanjani, Austin, TX (US);

Brian P. Chesney, Bee Cave, TX (US);

John C. Tucker, Austin, TX (US);

Christophe J. Amadi, Austin, TX (US);

Assignee:

Cirrus Logic, Inc., Austin, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/18 (2006.01); H04R 3/04 (2006.01); H04R 3/02 (2006.01); G10K 11/16 (2006.01); H03M 3/00 (2006.01); H03M 1/00 (2006.01); H03M 1/06 (2006.01);
U.S. Cl.
CPC ...
H03M 1/188 (2013.01); G10K 11/16 (2013.01); H03M 1/002 (2013.01); H03M 1/0631 (2013.01); H03M 1/181 (2013.01); H03M 3/466 (2013.01); H04R 3/02 (2013.01); H04R 3/04 (2013.01); H03M 1/18 (2013.01); H04R 2420/01 (2013.01); H04R 2430/03 (2013.01);
Abstract

In accordance with embodiments of the present disclosure, a processing system may include multiple selectable processing paths for processing an analog signal in order to reduce noise and increase dynamic range. Techniques are employed to transition between processing paths and calibrate operational parameters of the two paths in order to reduce or eliminate artifacts caused by switching between processing paths.


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