The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 07, 2019

Filed:

Feb. 24, 2017
Applicant:

Sandisk Technologies Llc, Plano, TX (US);

Inventors:

Juan Saenz, Menlo Park, CA (US);

Deepak Kamalanathan, San Jose, CA (US);

Guangle Zhou, San Jose, CA (US);

Ming-Che Wu, San Jose, CA (US);

Tanmay Kumar, Pleasanton, CA (US);

Assignee:

SanDisk Technologies LLC, Addison, TX (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/24 (2006.01); H01L 45/00 (2006.01);
U.S. Cl.
CPC ...
H01L 27/249 (2013.01); H01L 27/2454 (2013.01); H01L 45/10 (2013.01); H01L 45/1233 (2013.01); H01L 45/1253 (2013.01); H01L 45/14 (2013.01); H01L 45/1683 (2013.01);
Abstract

A method is provided that includes forming a word line above a substrate, the word line disposed in a first direction, forming a bit line above the substrate, the bit line disposed in a second direction perpendicular to the first direction, forming a nonvolatile memory material between the word line and the bit line, the nonvolatile memory material including a semiconductor material layer and conductive oxide material layer, forming a first barrier material layer between the word line and the nonvolatile memory material, forming a second barrier material layer between the bit line and the nonvolatile memory material, and forming a memory cell including the nonvolatile memory material at an intersection of the bit line and the word line.


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