The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 07, 2019

Filed:

Nov. 28, 2016
Applicant:

Plasma Antennas Limited, Lymington, GB;

Inventors:

Richard Brooke Keeton, Lymington, GB;

Ruth Elizabeth Harper, Didcot, GB;

David Hayes, St. Ives, GB;

Assignee:

Plasma Antennas Limited, Lymington, GB;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/52 (2006.01); H01L 23/66 (2006.01); H01L 27/08 (2006.01); H01P 1/15 (2006.01); H01L 21/56 (2006.01);
U.S. Cl.
CPC ...
H01L 23/66 (2013.01); H01L 21/56 (2013.01); H01L 27/0814 (2013.01); H01P 1/15 (2013.01); H01L 2223/6683 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/48227 (2013.01); H01L 2924/1423 (2013.01);
Abstract

A solid state plasma monolithic microwave integrated circuit having single or multiple elemental devices with at least three terminals operating within the microwave, millimeter wave or terahertz bands, that can be configured within a parallel plate structure, which solid state plasma monolithic microwave integrated circuit comprises: (i) a semiconductor dielectric substrate (); (ii) parallel plates () which comprise an upper conducting parallel plate () and a lower conducting parallel plate () and which parallel plates () are used to guide an electromagnetic wave; (iii) an isolating trench which is between the parallel plates (), and which is used to contain a solid state plasma; (iv) a distinct p-doped region and a distinct n-doped region which are within a first semiconductor region defined by the isolating trench below the upper conducting parallel plate (), and which are connected to two electrical bias terminals, where at least one electrical bias terminal forms a radio frequency short to the upper parallel plate (); and a p or n doped region within a second semiconductor region defined by the isolating trench above the lower conducting parallel plate () and connected to a third electrical bias terminal, where the third electrical bias terminal forms a radio frequency short to the lower conducting parallel plate (), and wherein; a solid state plasma is able to be controlled by voltage biasing of the three electrical bias terminals to either reflect, absorb or transmit an electromagnetic wave.


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