The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 07, 2019
Filed:
Jun. 23, 2017
Applicant:
SK Hynix Inc., Icheon, KR;
Inventor:
Joong Sik Kim, Yongin, KR;
Assignee:
SK HYNIX INC., Icheon, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/22 (2006.01); H01L 29/78 (2006.01); H01L 27/11597 (2017.01); H01L 43/02 (2006.01); H01L 43/08 (2006.01); H01L 43/10 (2006.01); H01L 45/00 (2006.01); G11C 11/00 (2006.01); G11C 11/56 (2006.01); G11C 11/16 (2006.01);
U.S. Cl.
CPC ...
G11C 11/2275 (2013.01); G11C 11/005 (2013.01); G11C 11/1675 (2013.01); G11C 11/223 (2013.01); G11C 11/5607 (2013.01); G11C 11/5657 (2013.01); H01L 27/11597 (2013.01); H01L 29/78391 (2014.09); H01L 43/02 (2013.01); H01L 43/08 (2013.01); H01L 43/10 (2013.01); H01L 45/12 (2013.01);
Abstract
Disclosed is a nonvolatile memory device. The nonvolatile memory device includes a ferroelectric memory element including a field effect transistor having a ferroelectric gate dielectric layer and a drain electrode. The nonvolatile memory device also includes a resistive memory element electrically connected in series to the drain electrode of the field effect transistor. A multilevel signal is stored in the nonvolatile memory device according to a channel resistance of the ferroelectric memory element and a resistance of the resistive memory element.