The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 07, 2019

Filed:

Oct. 29, 2014
Applicant:

Xilinx, Inc., San Jose, CA (US);

Inventors:

Yi-Hua E. Yang, San Jose, CA (US);

Patrick Lysaght, Los Gatos, CA (US);

Austin H. Lesea, Los Gatos, CA (US);

Graham F. Schelle, Longmont, CO (US);

Paul R. Schumacher, Berthoud, CO (US);

Assignee:

XILINX, INC., San Jose, CA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 13/24 (2006.01); G06F 13/26 (2006.01);
U.S. Cl.
CPC ...
G06F 13/24 (2013.01); G06F 13/26 (2013.01);
Abstract

An integrated circuit is provided for obtaining interrupt performance metrics. The integrated circuit includes a microprocessor executing an interrupt service routing monitoring framework that includes an interrupt handler and an application programming interface. The interrupt handler executes in response to a trigger condition and obtains timing data that includes at least one sample of a value of a timing logic according to a sampling schedule. The API exposes interrupt configuration functionality for registering the interrupt handler with a supervisory program and for configuring the interrupt handler to obtain the timing data.


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