The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 07, 2019

Filed:

Oct. 27, 2016
Applicant:

Nvidia Corporation, Santa Clara, CA (US);

Inventors:

Sailendra Chadalavda, Milpitas, CA (US);

Shantanu Sarangi, Saratoga, CA (US);

Milind Sonawane, San Jose, CA (US);

Amit Sanghani, San Jose, CA (US);

Jonathon E. Colburn, Ben Lomond, CA (US);

Dan Smith, Los Gatos, CA (US);

Jue Wu, Los Gatos, CA (US);

Mahmut Yilmaz, Los Altos Hills, CA (US);

Assignee:

NVIDIA CORPORATION, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/3177 (2006.01); G01R 31/26 (2014.01); G01R 31/317 (2006.01); G01R 31/28 (2006.01); G01R 31/3185 (2006.01); G06F 11/00 (2006.01);
U.S. Cl.
CPC ...
G01R 31/3177 (2013.01); G01R 31/2607 (2013.01); G01R 31/2803 (2013.01); G01R 31/2806 (2013.01); G01R 31/2834 (2013.01); G01R 31/31701 (2013.01); G01R 31/31707 (2013.01); G01R 31/31724 (2013.01); G01R 31/31725 (2013.01); G01R 31/318555 (2013.01); G01R 31/318572 (2013.01); G06F 11/00 (2013.01);
Abstract

In one embodiment, a test system comprises: a test partition configured to perform test operations; a centralized test controller for controlling testing by the test partition; and a test link interface controller configured to communicate between the centralized test controller and the test partition, wherein the test link interface controller controls dynamic changes to external pads associated with the test operations. The test link interface controller dynamically selects between an input direction and output direction for the external pads. The test link interface includes a pin direction controller that generates direction control signals based on the state of local test controller and communicates the desired direction to a boundary scan cell associated with the pin. The boundary scan cell programs the pad to either input or output direction depending on direction control signals. The input direction corresponds to driving test data and the output direction corresponds to observing test data.


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