The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 30, 2019

Filed:

May. 02, 2016
Applicant:

Semiconductor Components Industries, Llc, Phoenix, AZ (US);

Inventor:

Christopher Parks, Rochester, NY (US);

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04N 5/347 (2011.01); H04N 5/357 (2011.01); H04N 5/3728 (2011.01);
U.S. Cl.
CPC ...
H04N 5/347 (2013.01); H04N 5/3577 (2013.01); H04N 5/3728 (2013.01);
Abstract

A method of binning charges in a charge coupled device (CCD) image sensor is described. The frequency at which an HCCD in the CCD image sensor is clocked may be a multiple of the frequency at which a summing element coupled to the end of the HCCD is clocked, such that charges may be binned at a gate within the HCCD or at the summing element before being read out. The clock signal for the summing element may have a 50% duty cycle in order to provide additional time for charge to flow across an output gate to a floating diffusion node in an output stage of the CCD image sensor. For cases where the HCCD clock frequency is more than twice the summing element clock frequency, charges may be binned at the summing element. Otherwise, charges may be binned at another gate within the HCCD.


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