The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 30, 2019

Filed:

Apr. 24, 2018
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Omid Rajaee, San Diego, CA (US);

Elias Dagher, Laguna Niguel, CA (US);

Yan Wang, San Diego, CA (US);

Dinesh Jagannath Alladi, San Diego, CA (US);

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/18 (2006.01); H03M 1/66 (2006.01); H03M 3/00 (2006.01);
U.S. Cl.
CPC ...
H03M 1/181 (2013.01); H03M 1/66 (2013.01); H03M 3/37 (2013.01); H03M 3/30 (2013.01); H03M 3/374 (2013.01); H03M 3/454 (2013.01); H03M 3/458 (2013.01);
Abstract

A continuous-time analog-to-digital converter (ADC) includes a plurality of integrators selectively coupled in series. The ADC may further include a quantizer with excess loop delay (ELD) compensation. The quantizer may be coupled in series to a least one integrator. The ELD compensation may be programmable based on a transfer function of the ADC. The ADC may further include parallel digital-to-analog converters (DACs). Each DAC may have an input coupled to an output of the quantizer, and an output coupled to an input of a corresponding integrator. The ADC may further include a bypass path coupled to an input or output of one of the integrators. The bypass path may be configured to selectively bypass one or more of the integrators to change the transfer function of the ADC.


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