The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 30, 2019

Filed:

Jun. 29, 2015
Applicant:

Samsung Display Co., Ltd., Yongin, Gyeonggi-Do, KR;

Inventors:

Jae Hoon Jung, Anyang-si, KR;

Heung Shik Park, Seoul, KR;

Ki Chul Shin, Seongnam-si, KR;

Dan Bi Yang, Gunpo-si, KR;

Min-Joo Han, Seoul, KR;

Ji Phyo Hong, Pyeongtaek-si, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/786 (2006.01); H01L 29/8605 (2006.01); H01L 31/113 (2006.01); G02F 1/133 (2006.01); G09G 3/36 (2006.01); G02F 1/1362 (2006.01); G02F 1/1368 (2006.01); G02F 1/1343 (2006.01);
U.S. Cl.
CPC ...
H01L 29/78645 (2013.01); G02F 1/133 (2013.01); G02F 1/1368 (2013.01); G02F 1/13624 (2013.01); G09G 3/3648 (2013.01); H01L 29/78669 (2013.01); H01L 29/8605 (2013.01); H01L 31/113 (2013.01); G02F 2001/134345 (2013.01); G09G 2300/0447 (2013.01); G09G 2300/0465 (2013.01); G09G 2300/0842 (2013.01); G09G 2320/028 (2013.01);
Abstract

A liquid crystal display includes a first gate line, a first data line, and a first pixel. The first pixel includes: a first subpixel including a first thin film transistor connected to the first gate line and data line, and a first liquid crystal capacitor, wherein a first terminal of the first liquid crystal capacitor is electrically connected to the first thin film transistor and a second terminal of the first liquid crystal capacitor is configured to receive a common voltage; and a second subpixel including a second thin film transistor connected to the first gate line and data line, a second liquid crystal capacitor, wherein a first terminal of the second liquid crystal capacitor is configured to receive the common voltage, and a thin film transistor resistor electrically connected between the second thin film transistor and a second terminal of the second liquid crystal capacitor.


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