The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 30, 2019

Filed:

Dec. 27, 2017
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Kaiping Liu, Plano, TX (US);

Imran Mahmood Khan, Richardson, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 49/02 (2006.01); H01L 21/321 (2006.01); H01L 21/3213 (2006.01); H01L 27/11509 (2017.01); H01L 27/11507 (2017.01);
U.S. Cl.
CPC ...
H01L 28/24 (2013.01); H01L 21/3211 (2013.01); H01L 21/32138 (2013.01); H01L 27/11507 (2013.01); H01L 27/11509 (2013.01);
Abstract

A method of fabricating ICs including thin film resistors (TFRs) depositing a dielectric liner layer on a substrate including a semiconductor surface having a plurality of IC die formed therein each including functional circuitry comprising a plurality of interconnected transistors. A TFR layer comprising chromium (Cr) is deposited on the dielectric liner layer. The TFR layer is plasma treated with atomic nitrogen and atomic hydrogen. A dielectric capping layer is deposited on the TFR layer after the plasma treating. A pattern is formed on the capping layer, and the TFR layer is etched to form at least one resistor that comprises the TFR layer.


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