The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 30, 2019

Filed:

Sep. 12, 2016
Applicant:

Vanguard International Semiconductor Corporation, Hsinchu, TW;

Inventors:

Ying-Kai Chou, Puzih, TW;

Li-Che Chen, Hsinchu, TW;

Hsing-Chao Liu, Jhudong Township, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/02 (2006.01); H01L 21/28 (2006.01); H01L 21/762 (2006.01); H01L 27/088 (2006.01); H01L 21/8234 (2006.01);
U.S. Cl.
CPC ...
H01L 27/088 (2013.01); H01L 21/28123 (2013.01); H01L 21/76224 (2013.01); H01L 21/823462 (2013.01); H01L 21/823481 (2013.01); H01L 21/02238 (2013.01); H01L 21/02255 (2013.01);
Abstract

A semiconductor device and a method for forming the same are provided. The method includes forming a patterned mask on a substrate, wherein the patterned mask includes a pad oxide layer and a silicon nitride layer over the pad oxide layer. The method also includes forming a trench in the substrate by performing a first etching process on the substrate through an opening of the patterned mask and forming a dielectric material layer in the trench, in the opening, and on the patterned mask. The method further includes performing a planarization process to remove the dielectric material layer outside of the trench, and performing a heat treatment process to form an oxidized portion at the interface of the pad oxide layer and the substrate and adjacent to the dielectric material layer.


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