The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 30, 2019

Filed:

May. 02, 2018
Applicant:

Sandisk Semiconductor (Shanghai) Co. Ltd., Shanghai, CN;

Inventors:

Shuai Wu, Shanghai, CN;

Xu Wang, Shanghai, CN;

Seanan Wang, Shanghai, CN;

Peng Lu, Shanghai, CN;

Li Wang, Shanghai, CN;

Chong Un Tan, Shanghai, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/00 (2006.01); H01L 25/065 (2006.01); H01L 23/00 (2006.01); H01L 25/00 (2006.01); H01L 21/00 (2006.01);
U.S. Cl.
CPC ...
H01L 25/0657 (2013.01); H01L 23/564 (2013.01); H01L 25/50 (2013.01); H01L 2225/0651 (2013.01); H01L 2225/06506 (2013.01); H01L 2225/06562 (2013.01);
Abstract

A semiconductor device with die tilt control is disclosed. In one embodiment, a semiconductor device is provided comprising: a substrate; a first semiconductor die stacked on the substrate; and a plurality of additional semiconductor dies stacked on the first semiconductor die, wherein the plurality of additional semiconductor dies are stacked in an offset configuration, such that an edge of each of the plurality of additional semiconductor dies overhangs an edge of the semiconductor die on which it is stacked; wherein a thickness of a top-most semiconductor die of the plurality of additional semiconductor dies is greater than a thickness of any of the other additional semiconductor dies. Other embodiments are provided.


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