The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 30, 2019

Filed:

Feb. 16, 2015
Applicants:

Mediatek Singapore Pte. Ltd., Singapore, SG;

Hugh Thomas Mair, Fairview, TX (US);

Sumanth Katte Gururajarao, Dallas, TX (US);

Gordon Gammie, Austin, TX (US);

Alice Wang, Allen, TX (US);

Uming Ko, Houston, TX (US);

Rolf Lagerquist, Lakeway, TX (US);

Inventors:

Hugh Thomas Mair, Fairview, TX (US);

Sumanth Katte Gururajarao, Dallas, TX (US);

Gordon Gammie, Austin, TX (US);

Alice Wang, Allen, TX (US);

Uming Ko, Houston, TX (US);

Rolf Lagerquist, Lakeway, TX (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/32 (2019.01); G06F 1/324 (2019.01); G06F 1/28 (2006.01); G06F 1/3206 (2019.01); G06F 1/3296 (2019.01);
U.S. Cl.
CPC ...
G06F 1/324 (2013.01); G06F 1/28 (2013.01); G06F 1/3206 (2013.01); G06F 1/3296 (2013.01); Y02D 10/126 (2018.01); Y02D 10/172 (2018.01);
Abstract

A method of detecting and preventing over current induced system failure is provided. An OC protect controller monitors a CPU total power consumption based on received CPU activity information. In response to the monitoring, if the CPU power consumption is over a threshold, then the OC protect controller outputs a frequency dithering control signal to reduce the CPU clock frequency such that the CPU does not reach an OC limit. The OC protect controller also outputs a PLL frequency control signal to reduce the PLL clock frequency to improve system efficiency.


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