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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10269928 B1

PDFFull Text
Date of Patent:
Apr. 23, 2019

Filed:

Sep. 27, 2017

Semiconductor devices having 3d channels, and methods of fabricating semiconductor devices having 3d channels

Applicant:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-Do, KR;

Inventors:

Soo-Hun Hong, Gunpo-si, KR;

Hee-Soo Kang, Seoul, KR;

Hyun-Jo Kim, Seoul, KR;

Sang-Pil Sim, Seongnam-si, KR;

Hee-Don Jung, Hwaseong-si, KR;

Assignee:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;

Attorney:

Volentine, Whitt & Francos, PLLC

Primary Examiner:

Trang Q Tran

Int. Cl.
CPC ...
H01L 29/161 (2006.01); H01L 29/66 (2006.01); H01L 27/088 (2006.01); H01L 29/06 (2006.01); H01L 21/8234 (2006.01); H01L 21/8238 (2006.01); H01L 27/092 (2006.01); H01L 29/08 (2006.01); H01L 29/16 (2006.01); H01L 21/762 (2006.01); H01L 29/78 (2006.01); H01L 29/165 (2006.01);
U.S. Cl.
CPC ...
H01L 29/66545 (2013.01); H01L 21/762 (2013.01); H01L 21/76229 (2013.01); H01L 21/823431 (2013.01); H01L 21/823481 (2013.01); H01L 21/823814 (2013.01); H01L 21/823821 (2013.01); H01L 21/823878 (2013.01); H01L 27/0886 (2013.01); H01L 27/0924 (2013.01); H01L 29/0649 (2013.01); H01L 29/0653 (2013.01); H01L 29/0847 (2013.01); H01L 29/161 (2013.01); H01L 29/1608 (2013.01); H01L 29/66795 (2013.01); H01L 29/785 (2013.01); H01L 21/823412 (2013.01); H01L 21/823425 (2013.01); H01L 29/165 (2013.01); H01L 29/7848 (2013.01);
Abstract

A semiconductor device includes a substrate including first to third fins aligned in a first direction, a first trench arranged between the first fin and the second fin, and a second trench arranged between the second fin and the third fin. The semiconductor device further includes a first field insulating film arranged in the first trench, a second field insulating film formed in the second trench, a first dummy gate arranged on the first field insulating film and a second dummy gate at least partly arranged on the second field insulating film. A lower surface of the second field insulating film is arranged to be lower than a lower surface of the first field insulating film.

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