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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10269760 B1

PDFFull Text
Date of Patent:
Apr. 23, 2019

Filed:

Nov. 17, 2017

Advanced chip to wafer stacking

Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Wei Lin, Albany, NY (US);

Spyridon Skordas, Troy, NY (US);

Assignee:

International Business Machines Corporation, Armonk, NY (US);

Attorney:

L. Jeffrey Kelly

Primary Examiner:

Lee D Wilson

Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 25/00 (2006.01); H01L 21/683 (2006.01); H01L 21/02 (2006.01); H01L 21/56 (2006.01); H01L 25/065 (2006.01); H01L 21/677 (2006.01); H01L 21/67 (2006.01); H01L 21/78 (2006.01);
U.S. Cl.
CPC ...
H01L 24/83 (2013.01); H01L 21/02057 (2013.01); H01L 21/561 (2013.01); H01L 21/67161 (2013.01); H01L 21/67207 (2013.01); H01L 21/67271 (2013.01); H01L 21/67742 (2013.01); H01L 21/6838 (2013.01); H01L 21/78 (2013.01); H01L 24/27 (2013.01); H01L 24/75 (2013.01); H01L 24/94 (2013.01); H01L 24/95 (2013.01); H01L 25/0657 (2013.01); H01L 25/50 (2013.01); H01L 2224/27002 (2013.01); H01L 2224/7501 (2013.01); H01L 2224/7565 (2013.01); H01L 2224/75981 (2013.01); H01L 2224/83005 (2013.01); H01L 2224/83193 (2013.01); H01L 2224/83896 (2013.01); H01L 2224/95001 (2013.01); H01L 2224/951 (2013.01); H01L 2225/06541 (2013.01);
Abstract

A method and structure for forming a 3D chip stack using a vacuum chuck. The method may include: forming a first bonding layer on a first wafer and first chips, where the first chips are on a first substrate; forming a second bonding layer on a second wafer and second chips, where the second chips are on a second substrate; separating the second chips from the second wafer, wherein a portion of the second bonding layer remains on the second chips; moving the separated second chips to a cleaning chamber using a vacuum chuck; cleaning the separated second chips in the cleaning chamber; and bonding the second bonding layer on the separated second chips to the first bonding layer on the first chips.

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