The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 23, 2019
Filed:
Sep. 12, 2017
Applicant:
Toshiba Memory Corporation, Minato-ku, JP;
Inventor:
Yuya Matsuda, Mie, JP;
Assignee:
TOSHIBA MEMORY CORPORATION, Minato-ku, JP;
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/308 (2006.01); H01L 21/683 (2006.01); H01L 21/66 (2006.01); H01L 21/67 (2006.01); H01L 21/311 (2006.01); H01J 37/32 (2006.01);
U.S. Cl.
CPC ...
H01L 21/6833 (2013.01); H01J 37/32091 (2013.01); H01J 37/32935 (2013.01); H01L 21/308 (2013.01); H01L 21/31116 (2013.01); H01L 21/31144 (2013.01); H01L 21/67253 (2013.01); H01L 22/14 (2013.01);
Abstract
In one embodiment, a semiconductor manufacturing apparatus includes an electrostatic chuck that includes a base and a first electrode provided on the base and is configured to electrostatically adsorb a wafer on the first electrode. The apparatus further includes a measurement module configured to measure potential of the wafer. The apparatus further includes a controller configured to adjust potential of the base based on the potential of the wafer and to adjust potential of the first electrode based on the potential of the wafer or the base, when the potential of the wafer measured by the measurement module changes.