The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 23, 2019

Filed:

Sep. 22, 2015
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Minsik Cho, Austin, TX (US);

Indira Nair, Briarcliff Manor, NY (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
G06F 17/509 (2013.01); G06F 17/505 (2013.01); G06F 17/5009 (2013.01); G06F 17/5022 (2013.01); G06F 17/5045 (2013.01);
Abstract

A method for condition analysis comprises receiving an algorithmic description of a hardware design, wherein the algorithmic description is specified using a programming language, generating an intermediate representation based on the algorithmic description, wherein the intermediate representation includes a plurality of nodes and a plurality of paths, wherein each path connects at least one node to at least one other node, computing a plurality of relationships between the plurality of nodes, wherein the plurality of relationships are based on the plurality of paths connecting the plurality of nodes and each relationship includes at least one of a dominance relationship and a post-dominance relationship between two or more nodes, partitioning the intermediate representation based on the computed relationships, performing an optimization using the partitioned intermediate representation, and converting results of the optimization to the hardware design.


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