The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 23, 2019

Filed:

Mar. 29, 2017
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;

Inventors:

Dongyan Jiang, San Jose, CA (US);

Changhui Lin, San Jose, CA (US);

Krishna Malladi, San Jose, CA (US);

Jongmin Gim, Milpitas, CA (US);

Hongzhong Zheng, Los Gatos, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G06F 3/06 (2006.01); G06F 12/10 (2016.01); G06F 13/16 (2006.01); G06F 13/42 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0644 (2013.01); G06F 3/0604 (2013.01); G06F 3/0619 (2013.01); G06F 3/0641 (2013.01); G06F 3/0656 (2013.01); G06F 3/0665 (2013.01); G06F 3/0683 (2013.01); G06F 12/10 (2013.01); G06F 13/1673 (2013.01); G06F 13/4282 (2013.01); G06F 2212/65 (2013.01); G06F 2213/0026 (2013.01); G06F 2213/16 (2013.01);
Abstract

A memory module includes a host interface configured to provide an interface to a host computer; one or more memory devices; a deduplication engine configured to provide a virtual memory capacity of the memory module that is larger than a physical size of the one or more memory devices; a memory controller for controlling access to the one or more memory devices; a volatile memory comprising a hash table, an overflow memory region, and a credit unit, wherein the overflow memory region stores user data when a hash collision occurs or the hash table is full, and wherein the credit unit stores an address of an invalidated entry in the overflow memory region; and a control logic is configured to control the overflow memory region and the credit unit and generate a warning indicating a status of the overflow memory region and the credit unit.


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