The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 23, 2019

Filed:

Jan. 28, 2016
Applicant:

Mediatek Inc., Hsinchu, TW;

Inventors:

Chuen-Shen Bernard Shung, San Jose, CA (US);

Jonathan Fuchuen Lee, Dublin, CA (US);

Zhaoqian Chen, Santa Clara, CA (US);

Tom Hsiou-Cheng Kao, Fremont, CA (US);

Assignee:

MediaTek Inc., Hsin-Chu, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 3/06 (2006.01); G06F 12/06 (2006.01); G11C 14/00 (2006.01); G11C 13/00 (2006.01); G11C 11/00 (2006.01);
U.S. Cl.
CPC ...
G06F 3/061 (2013.01); G06F 3/0655 (2013.01); G06F 3/0685 (2013.01); G06F 12/0638 (2013.01); G11C 11/005 (2013.01); G11C 13/0002 (2013.01); G11C 13/0021 (2013.01); G11C 14/0045 (2013.01); G06F 2212/205 (2013.01);
Abstract

A processing device includes a first memory interface for accessing a first memory device of a main memory. Each first memory interface is compatible with Low-Power Double-Data-Rate (LPDDR) signaling. The processing device further includes a second memory interface, which has different signaling characteristics from the first memory interface, for accessing a second memory device of the main memory. The second memory device has an access latency higher than the first memory device and lower than a secondary storage device. The first memory device and the second memory device may be used as a dual memory or a two-tiered memory.


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